Substrate Noise Coupling in Mixed- Signal Asics
(Hardcover) reviews, ratings, specs and prices. Buy online to get cheap, discounted lowest price
See prices on Amazon.com
Driven by applications such as telecommunications, computing and consumer/multimedia and facilitated by the progress in CMOS ULSI technology, the microelectronics IC market is characterized by an ever-increasing level of integration complexity. Today complete systems, that previously occupied one or more boards, are integrated on a few chips or even on one single multi-million transistor chip – a so called System-on-Chip (SoC). Although most functions in such integrated systems are implemented with digital or digital signal processing circuitry, the analog circuits needed at the interface between the electronic system and the continuous-valued outside world are also being integrated on the same die for reasons of cost and performance.
Unfortunately, the integration of both analog & RF circuits and digital circuits on the same die not only offers many benefits, but also creates some technical difficulties. Since the analog circuits exploit the low-level physics of the fabrication process, they remain difficult and costly to design, but they are also vulnerable to any kind of noise or crosstalk signals. The higher levels of integration (moving towards 100 million transistors per chip clocked at ever higher frequencies) make the mixed-signal signal integrity problem increasingly challenging. One of the most important problems is the parasitic supply and substrate noise coupling, caused by the fast switching of the digital circuitry that then propagates to the sensitive analog circuitry via the common substrate. It is therefore important to be able to predict the impact of digital switching noise on the analog circuit performance at the design stage of the integrated system, before the chip is taped out for fabrication, and to understand how this problem can be reduced.
The purpose of Substrate Noise Coupling in Mixed-Signal ASICs is to provide an overview of very recent research results in the field of substrate noise analysis and reduction techniques. Much of the reported work has been established as part of the Mixed-Signal Initiative of the European Union. It is a representative sampling of the current state of the art in this area. All the different aspects of the substrate noise coupling problem are covered. Some chapters describe techniques to model and reduce the digital switching noise injected in the substrate. Other chapters describe methods to analyse the propagation of the noise from the source (the digital circuitry) to the reception point (the embedded analog circuitry) through the substrate considered as a resistive/capacitive mesh. Finally, the remaining chapters describe techniques to model and especially to reduce the impact of substrate noise on the analog side. This is illustrated with several practical design examples and measurement results.
About the Author :
Georges Gielen has contributed to Substrate Noise Coupling in Mixed- Signal Asics as an editor.
Ewout S.J. MARTENS obtained the MsC and PhD degrees in Electrical Engineering from the Katholieke Universiteit Leuven, Belgium in 2001 and 2007, respectively. For his PhD work, he has been awarded a research fellowship from the Fund for Scientific Research (FWO) of Flanders, Belgium. Currently, he is working as a research assistant at the ESAT?MICAS laboratories of the Katholieke Universiteit Leuven.
His research interests are in the development of systematic techniques and methodologies suited for implementation in analog CAD tools. Specific research topics include the modeling of A-to-D cReviews (See reviews on Amazon.com) Features & Specifications (See more features & specs on Amazon.com)
|Title:||Substrate Noise Coupling in Mixed- Signal Asics|
|Author:||Stephane Donnay, Stiphane Donnay, Georges Gielen|
|No. of Pages:||288|